-- Company: aujus technology pvt.ltd
-- Engineer: arun chaudhary
--
-- Create Date: 31.08.2020 13:24:34
-- Design Name: raystar oled cotrol -- timming dissimination
-- Module Name: oled_module_controllerv1 - Behavioral
-- Project Name: timming dissimination
-- Target Devices: zynq ,zedboard
-- Tool Versions: vivado 2018.3
-- Description:
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.all;
USE IEEE.STD_LOGIC_UNSIGNED.all;
entity oled_module_controllerv1 is
Port ( clk : in STD_LOGIC;
rst : in STD_LOGIC;
key_in: in std_logic_vector (0 to 15) ;
adt_sec10 : in std_logic_vector(3 downto 0) ;
key_lock : in std_logic_vector (1 downto 0) ;
status_reg : in std_logic_vector( 1 downto 0) ;
led : out std_logic_vector(1 downto 0) ;
prun : in std_logic ;
prun_led : out std_logic ;
cdt_hour10 , cdt_hour1, cdt_min10 ,cdt_min1, cdt_sec10 ,cdt_sec1 : in std_logic_vector (3 downto 0) ;
adt_day100,adt_day10 ,adt_day1 : in std_logic_Vector ( 3 downto 0) ;
adt_sec1 : in std_logic_vector( 3 downto 0) ;
adt_min10, adt_min1 : in std_logic_vector( 3 downto 0) ;
adt_hour10,adt_hour1:in std_logic_vector( 3 downto 0) ;
data_out : inout STD_LOGIC_vector( 7 downto 0) ;
rs : out STD_LOGIC;
rw : out STD_LOGIC;
e : out STD_LOGIC);
end oled_module_controllerv1;
architecture Behavioral of oled_module_controllerv1 is
signal clock_count : unsigned ( 23 downto 0) :=(others=>'0') ;
signal clk_enable400 : std_logic :='0' ;
type state_type is (func_set, display_on, mode_set, print_string,
line2, return_home, drop_lcd_e, reset1, reset2,
reset3, display_off, display_clear ,line2_data,
line3,line3_data,line4,line4_data,adt_state,sec10,sec1 ,min10,min1,coln1,coln2, hour10 , hour1,day100,day10 ,day1 ,dcoln,
cdth10 ,cdth1, cdtm10,cdtm1 ,cdts10,cdts1, status ,coln3,coln4,coln5,st1,st2,st3,st4,st5);
signal state, next_command : state_type;
signal data_bus : std_logic_vector ( 7 downto 0) ;
signal lcd_e, lcd_rs, lcd_rw_int : std_Logic ;
type character_string is array ( 0 to 31 ) of STD_LOGIC_VECTOR( 7 downto 0 );
signal lcd_display_string : character_string;
signal lcd_display_string_01 : character_string;
signal lcd_display_string_02 : character_string;
signal lcd_display_string_03 : character_string;
signal next_char : STD_LOGIC_VECTOR(7 downto 0);
signal char_count : STD_LOGIC_VECTOR(4 downto 0);
signal counter : unsigned ( 26 downto 0) :=( others=>'0') ;
signal sec_bcd: unsigned( 3 downto 0) :=( others=>'0') ;
signal sec_en: std_logic ;
signal sec_out : std_logic_vector( 7 downto 0) ;
------------------adt ------------
type str1 is array ( 0 to 5) of std_logic_Vector ( 7 downto 0) ;
signal adt_string,cdt_string : str1;
signal adt :std_logic_vector ( 7 downto 0) ;
signal cdt: std_logic_vector( 7 downto 0) ;
signal str_count : std_logic_vector( 2 downto 0) :="000" ;
signal wait_count : std_logic_vector( 3 downto 0) := "0000" ;
signal adt_d1s: std_logic_vector ( 7 downto 0) ;
signal adt_d10s : std_logic_vector ( 7 downto 0) ;
signal adt_d100s: std_logic_vector ( 7 downto 0) ;
signal adt_sec1s: std_logic_vector ( 7 downto 0) ;
signal adt_sec10s : std_logic_vector ( 7 downto 0) ;
signal adt_min1s: std_logic_vector ( 7 downto 0) ;
signal adt_min10s : std_logic_vector ( 7 downto 0) ;
signal adt_hour1s: std_logic_vector ( 7 downto 0) ;
signal adt_hour10s : std_logic_vector ( 7 downto 0) ;
--------------------------cdt--------------------------------
signal cdt_sec1s: std_logic_vector ( 7 downto 0) ;
signal cdt_sec10s : std_logic_vector ( 7 downto 0) ;
signal cdt_min1s: std_logic_vector ( 7 downto 0) ;
signal cdt_min10s : std_logic_vector ( 7 downto 0) ;
signal cdt_hour1s: std_logic_vector ( 7 downto 0) ;
signal cdt_hour10s : std_logic_vector ( 7 downto 0) ;
---------------------xxxxxxxxxxxxxxxx----------
signal key_stored, fkey_stored: std_logic_vector( 7 downto 0) ;
signal key_q : std_logic_vector( 0 to 15 ) ;
-----------------key string
type key_str is array ( 0 to 4 ) of std_logic_vector ( 7 downto 0 ) ;
signal key_str1, key_str2,key_str3 : key_str ;
signal rom_str1 , rom_str2, str,rom_str3 : std_logic_vector( 7 downto 0) ;
-------status -register ---------
signal sts_reg : std_logic_vector ( 1 downto 0) ;
begin
-------------== keylock = pushbutton ====================
process ( key_lock)
begin
case key_lock is
when "00" => led <="00" ;
when "01" => led <="01" ;
when "10" => led <="10" ;
when "11" => led <="10" ;
end case ;
end process ;
prun_led <='1' when prun='1' else '0' ;
-----------------------=========================
-------------=============================
key_str1 <= ( x"68", x"65" , x"6c" , x"6c" , x"6f" );
rom_str1 <= key_str1( conv_integer(str_count) ) ;
key_str2 <= ( x"61", x"75" , x"67" , x"75" , x"73" );
rom_str2 <= key_str2( conv_integer(str_count) ) ;
key_str3 <= ( x"61", x"72" , x"75" , x"6e" , x"20" );
rom_str3 <= key_str3( conv_integer(str_count) ) ;
---------===============================
process(clk )
begin
if (rst='1') then
key_q<=x"0000" ;
elsif rising_edge ( clk ) then
key_q <= key_in ;
end if ;
end process ;
--process( key_in)
-- begin
-- case key_in is
-- when x"4000" =>
-- key_stored<=x"30" ;
-- when x"2000"=>
-- key_stored<=x"31" ;
-- when x"1000"=>
-- key_stored <=x"32" ;
-- when x"0020"=>
-- key_stored<=x"33" ;
-- when x"0800"=>
-- key_stored <=x"34" ;
-- when x"0400"=>
-- key_stored <=x"35" ;
-- when x"0200"=>
-- key_stored<=x"36" ;
-- when x"0010"=>
-- key_stored <=x"37" ;
-- when x"0100"=>
-- key_stored <=x"38" ;
-- when x"0080"=>
-- key_stored <=x"39" ;
-- when x"0040"=>
-- key_stored <=x"40" ;
-- when x"0008"=>
-- key_stored <=x"41" ;
-- when x"8000"=>
-- key_stored <=x"42" ;
-- when x"0001"=>
-- key_stored <=x"43" ;
-- when x"0002"=>
-- key_stored <=x"44" ;
-- when x"0004"=>
-- key_stored <=x"45" ;
-- when others =>
-- key_stored <= x"20" ;
-- end case ;
-- end process ;
-----------------xxxxxxxxx----------------------------
-----------adt day---------------------------------
--------------------------------------------
process ( adt_day1) begin
case adt_day1 is
when "0000" =>
adt_d1s<=x"30" ;
when "0001"=>
adt_d1s<=x"31" ;
when "0010"=>
adt_d1s <=x"32" ;
when "0011"=>
adt_d1s<=x"33" ;
when "0100"=>
adt_d1s <=x"34" ;
when "0101"=>
adt_d1s <=x"35" ;
when others=>
adt_d1s <=x"30" ;
end case ;
end process ;
process ( adt_day10) begin
case adt_day10 is
when "0000" =>
adt_d10s<=x"30" ;
when "0001"=>
adt_d10s<=x"31" ;
when "0010"=>
adt_d10s <=x"32" ;
when "0011"=>
adt_d10s<=x"33" ;
when "0100"=>
adt_d10s <=x"34" ;
when "0101"=>
adt_d10s <=x"35" ;
when "0110"=>
adt_d10s<=x"36" ;
when others=>
adt_d10s <=x"30" ;
end case ;
end process ;
process ( adt_day100) begin
case adt_day100 is
when "0000" =>
adt_d100s<=x"30" ;
when "0001"=>
adt_d100s<=x"31" ;
when "0010"=>
adt_d100s <=x"32" ;
when "0011"=>
adt_d100s<=x"33" ;
when others=>
adt_d100s <=x"30" ;
end case ;
end process ;
----------------------------XXXXXXXXXXXXXXXXXX---------------------------------
------------------ADT HOUR ---------------------------------------------------
----------=============================================
process ( adt_hour10)
begin
case adt_hour10 is
when "0000" =>
adt_hour10s<=x"30" ;
when "0001"=>
adt_hour10s<=x"31" ;
when "0010"=>
adt_hour10s <=x"32" ;
when "0011"=>
adt_hour10s<=x"33" ;
when "0100"=>
adt_hour10s <=x"34" ;
when "0101"=>
adt_hour10s <=x"35" ;
when "0110"=>
adt_hour10s<=x"36" ;
when "0111"=>
adt_hour10s <=x"37" ;
when "1000"=>
adt_hour10s <=x"38" ;
when "1001"=>
adt_hour10s <=x"39" ;
when others =>
adt_hour10s <= x"30" ;
end case ;
end process ;
process ( adt_hour1)
begin
case adt_hour1 is
when "0000" =>
adt_hour1s<=x"30" ;
when "0001"=>
adt_hour1s <=x"31" ;
when "0010"=>
adt_hour1s<=x"32" ;
when "0011"=>
adt_hour1s <=x"33" ;
when "0100"=>
adt_hour1s <=x"34" ;
when "0101"=>
adt_hour1s <=x"35" ;
when "0110"=>
adt_hour1s <=x"36" ;
when "0111"=>
adt_hour1s <=x"37" ;
when "1000"=>
adt_hour1s <=x"38" ;
when "1001"=>
adt_hour1s <=x"39" ;
when others =>
adt_hour1s <= x"30" ;
end case ;
end process ;
----------------------XXXXXXXXXXXXXXXXX-------------------------------
--------------------ADT MIN-------------------------------------------------
------------------======================================
process ( adt_min10)
begin
case adt_min10 is
when "0000" =>
adt_min10s<=x"30" ;
when "0001"=>
adt_min10s <=x"31" ;
when "0010"=>
adt_min10s <=x"32" ;
when "0011"=>
adt_min10s <=x"33" ;
when "0100"=>
adt_min10s <=x"34" ;
when "0101"=>
adt_min10s <=x"35" ;
when "0110"=>
adt_min10s <=x"36" ;
when "0111"=>
adt_min10s <=x"37" ;
when "1000"=>
adt_min10s <=x"38" ;
when "1001"=>
adt_min10s <=x"39" ;
when others =>
adt_min10s <= x"30" ;
end case ;
end process ;
process ( adt_min1)
begin
case adt_min1 is
when "0000" =>
adt_min1s<=x"30" ;
when "0001"=>
adt_min1s <=x"31" ;
when "0010"=>
adt_min1s <=x"32" ;
when "0011"=>
adt_min1s <=x"33" ;
when "0100"=>
adt_min1s <=x"34" ;
when "0101"=>
adt_min1s <=x"35" ;
when "0110"=>
adt_min1s <=x"36" ;
when "0111"=>
adt_min1s <=x"37" ;
when "1000"=>
adt_min1s <=x"38" ;
when "1001"=>
adt_min1s <=x"39" ;
when others =>
adt_min1s <= x"30" ;
end case ;
end process ;
----------------------xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx-----------------------------
---------------ADT SEC-------------------------------------------------
-------===============================================
process ( adt_sec1)
begin
case (adt_sec1 ) is
when "0000" =>
adt_sec1s <=x"30" ;
when "0001"=>
adt_sec1s <=x"31" ;
when "0010"=>
adt_sec1s <=x"32" ;
when "0011"=>
adt_sec1s <=x"33" ;
when "0100"=>
adt_sec1s <=x"34" ;
when "0101"=>
adt_sec1s <=x"35" ;
when "0110"=>
adt_sec1s <=x"36" ;
when "0111"=>
adt_sec1s <=x"37" ;
when "1000"=>
adt_sec1s <=x"38" ;
when "1001"=>
adt_sec1s <=x"39" ;
when others =>
adt_sec1s <= x"30" ;
end case ;
end process ;
process ( adt_sec10)
begin
case adt_sec10 is
when "0000" =>
adt_sec10s <=x"30" ;
when "0001"=>
adt_sec10s <=x"31" ;
when "0010"=>
adt_sec10s <=x"32" ;
when "0011"=>
adt_sec10s <=x"33" ;
when "0100"=>
adt_sec10s <=x"34" ;
when "0101"=>
adt_sec10s <=x"35" ;
when "0110"=>
adt_sec10s <=x"36" ;
when "0111"=>
adt_sec10s <=x"37" ;
when "1000"=>
adt_sec10s <=x"38" ;
when "1001"=>
adt_sec10s <=x"39" ;
when others =>
adt_sec10s <= x"30" ;
end case ;
end process ;
--------------=============================cdt=======================
----============================================================
----------------------------XXXXXXXXXXXXXXXXXX---------------------------------
------------------CDT HOUR ---------------------------------------------------
----------=============================================
process ( cdt_hour10)
begin
case cdt_hour10 is
when "0000" =>
cdt_hour10s<=x"30" ;
when "0001"=>
cdt_hour10s<=x"31" ;
when "0010"=>
cdt_hour10s <=x"32" ;
when "0011"=>
cdt_hour10s<=x"33" ;
when "0100"=>
cdt_hour10s <=x"34" ;
when "0101"=>
cdt_hour10s <=x"35" ;
when "0110"=>
cdt_hour10s<=x"36" ;
when "0111"=>
cdt_hour10s <=x"37" ;
when "1000"=>
cdt_hour10s <=x"38" ;
when "1001"=>
cdt_hour10s <=x"39" ;
when others =>
cdt_hour10s <= x"30" ;
end case ;
end process ;
process ( cdt_hour1)
begin
case cdt_hour1 is
when "0000" =>
cdt_hour1s<=x"30" ;
when "0001"=>
cdt_hour1s <=x"31" ;
when "0010"=>
cdt_hour1s<=x"32" ;
when "0011"=>
cdt_hour1s <=x"33" ;
when "0100"=>
cdt_hour1s <=x"34" ;
when "0101"=>
cdt_hour1s <=x"35" ;
when "0110"=>
cdt_hour1s <=x"36" ;
when "0111"=>
cdt_hour1s <=x"37" ;
when "1000"=>
cdt_hour1s <=x"38" ;
when "1001"=>
cdt_hour1s <=x"39" ;
when others =>
cdt_hour1s <= x"30" ;
end case ;
end process ;
----------------------XXXXXXXXXXXXXXXXX-------------------------------
--------------------ADT MIN-------------------------------------------------
------------------======================================
process ( cdt_min10)
begin
case cdt_min10 is
when "0000" =>
cdt_min10s<=x"30" ;
when "0001"=>
cdt_min10s <=x"31" ;
when "0010"=>
cdt_min10s <=x"32" ;
when "0011"=>
cdt_min10s <=x"33" ;
when "0100"=>
cdt_min10s <=x"34" ;
when "0101"=>
cdt_min10s <=x"35" ;
when "0110"=>
cdt_min10s <=x"36" ;
when "0111"=>
cdt_min10s <=x"37" ;
when "1000"=>
cdt_min10s <=x"38" ;
when "1001"=>
cdt_min10s <=x"39" ;
when others =>
cdt_min10s <= x"30" ;
end case ;
end process ;
process ( cdt_min1)
begin
case cdt_min1 is
when "0000" =>
cdt_min1s<=x"30" ;
when "0001"=>
cdt_min1s <=x"31" ;
when "0010"=>
cdt_min1s <=x"32" ;
when "0011"=>
cdt_min1s <=x"33" ;
when "0100"=>
cdt_min1s <=x"34" ;
when "0101"=>
cdt_min1s <=x"35" ;
when "0110"=>
cdt_min1s <=x"36" ;
when "0111"=>
cdt_min1s <=x"37" ;
when "1000"=>
cdt_min1s <=x"38" ;
when "1001"=>
cdt_min1s <=x"39" ;
when others =>
cdt_min1s <= x"30" ;
end case ;
end process ;
----------------------xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx-----------------------------
---------------ADT SEC-------------------------------------------------
-------===============================================
process ( cdt_sec1)
begin
case (cdt_sec1 ) is
when "0000" =>
cdt_sec1s <=x"30" ;
when "0001"=>
cdt_sec1s <=x"31" ;
when "0010"=>
cdt_sec1s <=x"32" ;
when "0011"=>
cdt_sec1s <=x"33" ;
when "0100"=>
cdt_sec1s <=x"34" ;
when "0101"=>
cdt_sec1s <=x"35" ;
when "0110"=>
cdt_sec1s <=x"36" ;
when "0111"=>
cdt_sec1s <=x"37" ;
when "1000"=>
cdt_sec1s <=x"38" ;
when "1001"=>
cdt_sec1s <=x"39" ;
when others =>
cdt_sec1s <= x"30" ;
end case ;
end process ;
process ( cdt_sec10)
begin
case cdt_sec10 is
when "0000" =>
cdt_sec10s <=x"30" ;
when "0001"=>
cdt_sec10s <=x"31" ;
when "0010"=>
cdt_sec10s <=x"32" ;
when "0011"=>
cdt_sec10s <=x"33" ;
when "0100"=>
cdt_sec10s <=x"34" ;
when "0101"=>
cdt_sec10s <=x"35" ;
when "0110"=>
cdt_sec10s <=x"36" ;
when "0111"=>
cdt_sec10s <=x"37" ;
when "1000"=>
cdt_sec10s <=x"38" ;
when "1001"=>
cdt_sec10s <=x"39" ;
when others =>
cdt_sec10s <= x"30" ;
end case ;
end process ;
------------------------xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx-----------------------
adt_string <=( x"41" ,x"44" ,x"54" , x"3a",x"20" ,x"20" ) ;
adt <= adt_string (conv_integer ( str_count ) ) ;
cdt_string <=(x"43" , x"44" , x"54" ,x"3a",x"20" ,x"20" );
cdt <= cdt_string ( conv_integer ( str_count)) ;
process ( clk )
begin
if rising_edge (clk) then
if (rst='1') then
counter<=(others=>'0') ;
else
counter <= counter +1 ;
end if ;
end if ;
end process ;
sec_en <='1' when counter = 99999999 else '0' ;
process ( clk)
begin
if rising_edge ( clk) then
if (rst='1') then
sec_bcd<=(others=>'0') ;
elsif ( sec_en='1') then
if ( sec_bcd=9) then
sec_bcd<= (others=>'0') ;
else
sec_bcd <= sec_bcd +1 ;
end if ;
end if ;
end if ;
end process ;
process ( sec_bcd)
begin
case sec_bcd is
when "0000" =>
sec_out <=x"30" ;
when "0001"=>
sec_out <=x"31" ;
when "0010"=>
sec_out <=x"32" ;
when "0011"=>
sec_out <=x"33" ;
when "0100"=>
sec_out <=x"34" ;
when "0101"=>
sec_out <=x"35" ;
when "0110"=>
sec_out <=x"36" ;
when "0111"=>
sec_out <=x"37" ;
when "1000"=>
sec_out <=x"38" ;
when "1001"=>
sec_out <=x"39" ;
when others =>
sec_out <= x"30" ;
end case ;
end process ;
-- BIDIRECTIONAL TRI STATE LCD DATA BUS
data_out <= data_bus when lcd_rw_int = '0' else "ZZZZZZZZ";
-- LCD_RW PORT is assigned to it matching SIGNAL
rw <= lcd_rw_int;
e<=lcd_e ;
rs <=lcd_rs ;
process ( clk )
begin
if rising_edge ( clk) then
if ( rst='1') then
clock_count <=(others=>'0') ;
clk_enable400<='0' ;
else
-- if ( clock_count <= 312500) then ------------400 hz signal enable working
-- if ( clock_count <= 520) then -----------240 khz enable signal for zybo working 125 mhz
if ( clock_count <= 416) then -----------240 khz enable signal for zedboard working 100 mhz
clock_count <= clock_count +1 ;
clk_enable400 <='0' ;
else
clock_count<=(others=>'0') ;
clk_enable400 <='1';
end if ;
end if ;
end if ;
end process ;
------------------------------------------------------------------
---------------statemachine cotnrol-----------------------------
--------------------------------------------------------------------
process ( clk,rst)
begin
if (rst='1') then
state <= reset1;
data_bus <= x"38"; -- RESET
next_command <= reset2;
lcd_e <= '1'; ------------enableing data in 120 khz half of the clk_enable
lcd_rs <= '0';
lcd_rw_int <= '0';
str_count <= "000" ;
wait_count <="0000" ;
elsif rising_edge(clk) then
if clk_enable400 = '1' then
case (state ) is
--======================= INITIALIZATION START ============================--
when reset1 =>
lcd_e <= '1';
lcd_rs <= '0';
lcd_rw_int <= '0';
data_bus <= x"38"; -- EXTERNAL RESET
state <= drop_lcd_e;
next_command <= reset2;
char_count <= "00000";
wait_count <="0000" ;
when reset2 =>
lcd_e <= '1';
lcd_rs <= '0';
lcd_rw_int <= '0';
data_bus <= x"38"; -- EXTERNAL RESET
state <= drop_lcd_e;
next_command <= reset3;
when reset3 =>
lcd_e <= '1';
lcd_rs <= '0';
lcd_rw_int <= '0';
data_bus <= x"38"; -- EXTERNAL RESET
state <= drop_lcd_e;
next_command <= func_set;
-- Function Set
--==============--
when func_set =>
lcd_e <= '1';
lcd_rs <= '0';
lcd_rw_int <= '0';
data_bus <= x"38"; -- Set Function to 8-bit transfer, 2 line display and a 5x8 Font size
state <= drop_lcd_e;
next_command <= display_off;
-- Turn off Display
--==============--
when display_off =>
lcd_e <= '1';
lcd_rs <= '0';
lcd_rw_int <= '0';
data_bus <= x"08"; -- Turns OFF the Display, Cursor OFF and Blinking Cursor Position OFF.......
-- (0F = Display ON and Cursor ON, Blinking cursor position ON)
state <= drop_lcd_e;
next_command <= display_clear;
-- Clear Display
--==============--
when display_clear =>
lcd_e <= '1';
lcd_rs <= '0';
lcd_rw_int <= '0';
data_bus <= x"01"; -- Clears the Display
state <= drop_lcd_e;
next_command <= display_on;
-- Turn on Display and Turn off cursor
--===================================--
when display_on =>
lcd_e <= '1';
lcd_rs <= '0';
lcd_rw_int <= '0';
data_bus <= x"0C"; -- Turns on the Display (0E = Display ON, Cursor ON and Blinking cursor OFF)
state <= drop_lcd_e;
next_command <= mode_set;
-- Set write mode to auto increment address and move cursor to the right
--====================================================================--
when mode_set =>
lcd_e <= '1';
lcd_rs <= '0';
lcd_rw_int <= '0';
data_bus <= x"06"; -- Auto increment address and move cursor to the right
state <= drop_lcd_e;
next_command <=adt_state ;
when adt_state =>
state <= drop_lcd_e;
lcd_e <= '1';
lcd_rs <= '1';
lcd_rw_int <= '0';
----------------------------added
data_bus <=adt ;
if ( str_count ="101") then
str_count <="000" ;
-- next_command<=hour10;
next_command<=day100;
else
str_count <= str_count +1 ;
end if ;
------------------------added code ------------------
when day100=>
state <= drop_lcd_e;
lcd_e <= '1';
lcd_rs <= '1';
lcd_rw_int <= '0';
----------------------------added
data_bus <=adt_d100s;
next_command<=day10;
when day10=>
state <= drop_lcd_e;
lcd_e <= '1';
lcd_rs <= '1';
lcd_rw_int <= '0';
----------------------------added
data_bus <=adt_d10s;
next_command<=day1;
when day1=>
state <= drop_lcd_e;
lcd_e <= '1';
lcd_rs <= '1';
lcd_rw_int <= '0';
----------------------------added
data_bus <=adt_d1s;
next_command<=dcoln;
when dcoln=>
state <= drop_lcd_e;
lcd_e <= '1';
lcd_rs <= '1';
lcd_rw_int <= '0';
----------------------------added
data_bus <=x"3a";
next_command<=hour10;
----------------------------------------
when hour10=>
state <= drop_lcd_e;
lcd_e <= '1';
lcd_rs <= '1';
lcd_rw_int <= '0';
----------------------------added
data_bus <=adt_hour10s;
next_command<=hour1;
when hour1=>
state <= drop_lcd_e;
lcd_e <= '1';
lcd_rs <= '1';
lcd_rw_int <= '0';
----------------------------added
data_bus <=adt_hour1s;
next_command<=coln2;
when coln2=>
state <= drop_lcd_e;
lcd_e <= '1';
lcd_rs <= '1';
lcd_rw_int <= '0';
----------------------------added
data_bus <=x"3a";
next_command<=min10;
when min10=>
state <= drop_lcd_e;
lcd_e <= '1';
lcd_rs <= '1';
lcd_rw_int <= '0';
----------------------------added
data_bus <=adt_min10s;
next_command<=min1;
when min1=>
state <= drop_lcd_e;
lcd_e <= '1';
lcd_rs <= '1';
lcd_rw_int <= '0';
----------------------------added
data_bus <=adt_min1s;
next_command<=coln1;
-----------------------------------------------------
when coln1=>
state <= drop_lcd_e;
lcd_e <= '1';
lcd_rs <= '1';
lcd_rw_int <= '0';
----------------------------added
data_bus <=x"3a";
next_command<=sec10;
when sec10=>
state <= drop_lcd_e;
lcd_e <= '1';
lcd_rs <= '1';
lcd_rw_int <= '0';
----------------------------added
data_bus <=adt_sec10s;
next_command<=sec1;
when sec1=>
state <= drop_lcd_e;
lcd_e <= '1';
lcd_rs <= '1';
lcd_rw_int <= '0';
----------------------------added
data_bus <=adt_sec1s;
next_command<=line2;
when print_string =>
state <= drop_lcd_e;
lcd_e <= '1';
lcd_rs <= '1';
lcd_rw_int <= '0';
----------------------------added
data_bus <=x"49" ;
next_command<=line2;
when line2 =>
lcd_e <= '1';
lcd_rs <= '0';
lcd_rw_int <= '0';
data_bus <= x"c0"; ---c0 default ---working
state <= drop_lcd_e;
next_command<=line2_data;
when line2_data=>
state <= drop_lcd_e;
lcd_e <= '1';
lcd_rs <= '1';
lcd_rw_int <= '0';
data_bus <= cdt ;
if ( str_count ="101") then
str_count <="000" ;
next_command<=cdth10;
-- next_command<=line3;
else
str_count <= str_count +1 ;
end if ;
----------------==========================cdt -timing
when cdth10=>
----------------------------
state <= drop_lcd_e;
lcd_e <= '1';
lcd_rs <= '1';
lcd_rw_int <= '0';
data_bus <=cdt_hour10s;
next_command<=cdth1;
--------------------------------
when cdth1=>
state <= drop_lcd_e;
lcd_e <= '1';
lcd_rs <= '1';
lcd_rw_int <= '0';
data_bus <=cdt_hour1s;
next_command<=coln3;
when coln3=>
state <= drop_lcd_e;
lcd_e <= '1';
lcd_rs <= '1';
lcd_rw_int <= '0';
data_bus <=x"3a";
next_command<=cdtm10;
-------- -----------------------------------------------------------------
----- ----- ------------min
when cdtm10=>
state <= drop_lcd_e;
lcd_e <= '1';
lcd_rs <= '1';
lcd_rw_int <= '0';
----------------------------added
data_bus <=cdt_min10s;
next_command<=cdtm1;
when cdtm1=>
state <= drop_lcd_e;
lcd_e <= '1';
lcd_rs <= '1';
lcd_rw_int <= '0';
----------------------------added
data_bus <=cdt_min1s;
next_command<=coln4;
-----------------------------------------------------
when coln4=>
state <= drop_lcd_e;
lcd_e <= '1';
lcd_rs <= '1';
lcd_rw_int <= '0';
----------------------------added
data_bus <=x"3a";
next_command<=cdts10;
when cdts10=>
state <= drop_lcd_e;
lcd_e <= '1';
lcd_rs <= '1';
lcd_rw_int <= '0';
----------------------------added
data_bus <=cdt_sec10s;
next_command<=cdts1;
when cdts1=>
state <= drop_lcd_e;
lcd_e <= '1';
lcd_rs <= '1';
lcd_rw_int <= '0';
----------------------------added
data_bus <=cdt_sec1s;
next_command<=coln5 ;
when coln5=>
state <= drop_lcd_e;
lcd_e <= '1';
lcd_rs <= '1';
lcd_rw_int <= '0';
----------------------------added
data_bus <=x"3a";
next_command<=status;
when status =>
state <= drop_lcd_e;
lcd_e <= '1';
lcd_rs <= '1';
lcd_rw_int <= '0';
----------------------------added
if ( status_reg ="00" ) then
data_bus <=x"48";
elsif ( status_reg="10" ) then
data_bus<=x"55" ;
elsif (status_reg="01" ) then
data_bus <=x"44" ;
else
data_bus <= x"30" ;
end if ;
next_command<=line3 ;
---------=====================================
when line3 =>
lcd_e <= '1';
lcd_rs <= '0';
lcd_rw_int <= '0';
data_bus <= x"94"; ---c0 default ---working
state <= drop_lcd_e;
next_command<=line3_data;
when line3_data =>
lcd_e <= '1';
lcd_rs <= '1';
lcd_rw_int <= '0';
data_bus <= sec_out ; ---c0 default ---working
state <= drop_lcd_e;
next_command<=line4;
when line4 =>
lcd_e <= '1';
lcd_rs <= '0';
lcd_rw_int <= '0';
data_bus <= x"d4"; ---c0 default ---working
state <= drop_lcd_e;
next_command<=line4_data;
when line4_data =>
------------------default workig
-- lcd_e <= '1';
-- lcd_rs <= '1';
-- lcd_rw_int <= '0';
-- data_bus <= x"48";
-- state <= drop_lcd_e;
-- next_command<=return_home;
-------------------------------======================
-- str_count<= str_count +1 ;
-- if ( key_in=x"4000" ) then
-- if ( str_count <=x"100") then
-- str_count <=(others=>'0');
-- data_bus <= x"40";
-- end if ;
-- elsif (key_in=x"2000") then
-- if ( str_count <=x"100") then
-- str_count<=(others
-- data_bus <= fkey_stored ; ---c0 default ---working
-- state <= drop_lcd_e;
-------------------------===================================
state <= drop_lcd_e;
lcd_e <= '1';
lcd_rs <= '1';
lcd_rw_int <= '0';
data_bus <=x"20";
if ( key_q=x"4000" ) then
data_bus <=x"31" ;
end if ;
if ( key_q=x"2000" ) then
next_command<=display_clear;
end if ;
next_command<=st1;
-----------------added for keypad input ------------------
when st1=>
lcd_e <= '1';
lcd_rs <= '1';
lcd_rw_int <= '0';
data_bus <= sec_out ; ---c0 default ---working
state <= drop_lcd_e;
next_command<=line4;
when st2=>
lcd_e <= '1';
lcd_rs <= '1';
lcd_rw_int <= '0';
data_bus <= sec_out ; ---c0 default ---working
state <= drop_lcd_e;
next_command<=line4;
when st3=>
lcd_e <= '1';
lcd_rs <= '1';
lcd_rw_int <= '0';
data_bus <= sec_out ; ---c0 default ---working
state <= drop_lcd_e;
next_command<=line4;
when st4=>
lcd_e <= '1';
lcd_rs <= '1';
lcd_rw_int <= '0';
data_bus <= sec_out ; ---c0 default ---working
state <= drop_lcd_e;
next_command<=line4;
when st5 =>
lcd_e <= '1';
lcd_rs <= '1';
lcd_rw_int <= '0';
data_bus <= sec_out ; ---c0 default ---working
state <= drop_lcd_e;
next_command<=return_home;
-------------------xxxxxxxxx---------------------------------
-----------------------------default -------------working
-- if ( key_in=x"4000" ) then
-- data_bus <=rom_str1 ;
-- end if ;
-- if ( key_in=x"2000" ) then
-- data_bus <=rom_str2 ;
-- end if ;
-- if ( key_in=x"1000" ) then
-- data_bus <=rom_str3;
-- end if ;
-- if ( str_count ="100") then
-- str_count <="000" ;
-- next_command<=return_home;
-- else
-- str_count <= str_count +1 ;
-- end if ;
----------------------default end --------------------
-- Return write address to first character position on line 1
--=========================================================--
when return_home =>
lcd_e <= '1';
lcd_rs <= '0';
lcd_rw_int <= '0';
-- data_bus <= x"80"; ---working
data_bus <= x"02";
state <= drop_lcd_e;
-- next_command <= print_string;
-- if ( key_stored=
next_command <=adt_state ;
-- The next states occur at the end of each command or data transfer to the LCD
-- Drop LCD E line - falling edge loads inst/data to LCD controller
--============================================================================--
when drop_lcd_e =>
state <= next_command;
lcd_e <= '0';
end case ;
end if ;
end if ;
end process ;
end Behavioral;-- Company:
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